Network-on-Chip with load balancing based on interleave of flits technique
نویسنده
چکیده
This paper presents the evaluation of a Network-onChip (NoC) that offers load balancing for Systems-on-Chip (SoCs) dedicated for multimedia applications that require high traffic of variable bitrate communication. The NoC is based on a technique that allows the interleaving of flits from different flows in the same communication channel, and keep the load balancing without a centralized control in the network. For this purpose, all flits in the network received extra bits, such that every flit carries routing information. The routers use this extra information to perform arbitration and schedule the flits to the corresponding output ports. Analytic comparisons and experimental data show that the approach adopted in the network keeps average latency lower for variable bitrate flows than a network based on resource reservation when both networks are working over 80% of offered load. Network-on-Chip; System-on-Chip; Load balancing; Multimedia
منابع مشابه
Reliability and Performance Evaluation of Fault-aware Routing Methods for Network-on-Chip Architectures (RESEARCH NOTE)
Nowadays, faults and failures are increasing especially in complex systems such as Network-on-Chip (NoC) based Systems-on-a-Chip due to the increasing susceptibility and decreasing feature sizes. On the other hand, fault-tolerant routing algorithms have an evident effect on tolerating permanent faults and improving the reliability of a Network-on-Chip based system. This paper presents reliabili...
متن کاملUsing DAMQ Self-Compacting Buffer to Improve Performance of NoC System
This paper presents present three novel buffer schemes for system on chip applications that have an interconnection network. The proposed schemes are based on a DAMQ self-compacting buffer to provide larger available buffer space per channel for incoming flits. The proposed schemes outperform existing approaches, and optimize buffer management by providing better throughput when the network has...
متن کاملEvaluation of silicon consumption for a connectionless Network-on-Chip
We present the design and evaluation of a predictable Network-on-Chip (NoC) to interconnect processing units running multimedia applications with variable-bit-rate. The design is based on a connectionless strategy in which flits from different communication flows are interleaved in the same communication channel between routers. Each flit carries routing information used by routers to perform a...
متن کاملHardware Implementation of Improved Adaptive NoC Router with Flit Flow History based Load Balancing Selection Strategy
To improve load balancing in NoCs several techniques exists in literature like Regional Congestion Awareness (RCA) and similar techniques. Also there are some techniques based on output port selection like count of free virtual channels, count of fluid buffers, buffer occupancy time at reachable downstream neighbors and flit flow history based algorithm named as Tracker. Among these techniques,...
متن کاملA Routing-Aware Simulated Annealing-based Placement Method in Wireless Network on Chips
Wireless network on chip (WiNoC) is one of the promising on-chip interconnection networks for on-chip system architectures. In addition to wired links, these architectures also use wireless links. Using these wireless links makes packets reach destination nodes faster and with less power consumption. These wireless links are provided by wireless interfaces in wireless routers. The WiNoC archite...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
- CoRR
دوره abs/1510.06791 شماره
صفحات -
تاریخ انتشار 2015